In some solid state storage systems, a small portion of the solid state storage media or drive is designated as cache. (Note that this cache is on the solid state storage media itself, as opposed to being on the (solid state) storage controller.) In some cases, the cache is implemented using single-level cells (SLC) where each cell stores 1 bit and the regular drive (i.e., the rest of the solid state storage media not in the cache) uses some denser cell technology, such as multi-level cell (MLC) where each cell stores 2 bits or tri-level cell (TLC) where each cell stores 3 bits. As a result of the different densities, the cache will have faster read and write times, is more error tolerant, and can withstand more program and erase (P/E) cycles than the regular drive. The downside is that a block in the cache will have a smaller capacity than a block in the regular drive because of the bit density differences between SLC and MLC (or TLC). New techniques which are better able to pick the size of a cache (e.g., during a mode where the cache is permitted to vary in size) would be desirable.